Category Archives: IBM Mainframe Assembler

Marist College sponsors one of my favorite mainframe conferences each year called the Enterprise Computing Conference. This year it is scheduled for June 7-9, and it is online and free. The conference always features some interesting general talks by leading IBM and industry experts, as well as a number of smaller talks on mainframe related topics. Here is your chance to attend for free. Check out the conference schedule here: https://ecc.marist.edu/web/conference2020/welcome

Be sure to register early so you won’t miss anything. I’m sorry I won’t get a chance to visit the lovely Marist campus on the Hudson river this year, but I’m looking forward to enjoying the conference virtually. See you there.

I have added a tab (Course Datasets) at the top of the blog to help provide input data for the programs referenced in the COBOL course.

In the case of input files that contain packed data, I am including a COBOL program that will produce the input file when you run it. Each COBOL program takes its own data from an in-stream dataset. I’m including the COBOL code and the JCL surrounding it to make things easier. You will have to adjust the file names.

In the case textual data files, I’m including a copy of the input data which you can paste into a member in a PDS to create the input file.

Let me know if I can help.

In the Video Course for IBM Assembler section, I’ve added an introductory lesson on Conditional Assembly and Macro Processing. If you haven’t written macros or want to learn something about conditional assembly instructions, this guide will get you started. There’s also a link to the Powerpoint that goes along with the video.

Cobol has been in the news lately since the NJ governor asked for help with some legacy systems.  Perhaps someone should tell him it’s worse than he thought – he’s going to need some assembler programmers, too. 🙂

Some of the recent discussion of Cobol by people who should know better is amusing if it weren’t also disappointing.  You would think that Cobol died in the 1970s.  The fact is, IBM’s Cobol compiler is quite sophisticated, as is the language.  This isn’t your father’s or mother’s Cobol. It is a truly modern language, even object-oriented if you want it to be. On the other hand, writing business systems in Java, C, Python, Ruby, etc.  represents a challenge I would not like to tackle (even though I love those languages).  In many ways those languages are ill-suited to the task – for example, just doing business arithmetic in Java requires some really ugly code.

But what do I know? I still think assembler is fun to write.

One thing’s for sure: It will be fun to hear the forensics of what happened with the governor’s legacy systems. I’m guessing it has little to do with any shortcomings in Cobol.

In the last post I suggested we take the challenge that John Ehrman posed in problem 41.7.1 of his well-known and used assembler book:

Programming Problem 41.3.(3)+ Write a program with a program interruption exit that generates each of the 15 possible interruption types in turn. For each interruption, generate a message describing the interruption type and the address of the interrupted instruction. Then, return to the mainline program to generate the next interruption.

David Staudacher contributed a number of interesting ways to abend, but I especially liked BCTR R15,R15 for a protection exception. Melvyn Maltz had some interesting comments about the whole issue and suggested he gets S0C5s whenever he uses a bad index into a branch table. You can see all their contributions in the comments on the last article.

I was surprised (after posting) to discover that John himself had already weighed in on this challenge in the Solutions part of his book. Here is what he published (page 1275 of his book):

41.7.1. Some possible but unverified instruction sequences are:

(01)  DC H’0′ Invalid operation

(02)   LPSW 0,8(0,0) Privileged operation

(03)  EX 0,* Execute

(04)  MVI 0,0 Protection

(05)  LGHI 1,-1

IC 1,0(,1) Addressing

(06)   DC X’1D11′ DR 1,1: Specification

(07)  AP *,* Decimal Data

(08)  LA 1,1

SLA 1,33 Fixed-point overflow

(09)   SRDL 0,63

DR 0,0 Fixed-point divide

(0A)   AP A,A Decimal Overflow

A DC P’6′

(0B)   DP A,=P’0′ Decimal Divide

(0C)   LE 0,=E’1E72′ Exponent overflow

MER 0,0

(0D)  LE 0,=E’1E-72′ Exponent underflow

MER 0,0

(0E) LE 0,=X’41000001′ Significance

SU 0,=X’41000001′

(0F)  LE 0,=E’1′ Floating-pointdivide

D 0,=E’0′

I tried running the code above and found an assembly error on (02). John said the code suggestions were unverified! Still he was on the right track. LPSW is a type S instruction and expects a simple base/displacement address, so LPSW 0(8) will generate the error he intended.

You can also get away with SLA 1,32 on (08), but that’s nit-picking.

The only problem in the list was his suggestion for (05) which generated an S0C6 for me instead of the S0C5 we require.

So how do we get a S0C5 exception to occur? I’ve tried a number of bad branches – protection errors every one. After reading the Principles of Operation, I’m wondering if a garden-variety programmer can easily get a S0C5? I hope one of you will prove me wrong. Send me the code that generates a S0C5!