Category Archives: IBM Mainframe Assembler

Videos and word documents that cover how to program in IBM mainframe assembler language.

IBM Z Day

Just a reminder that today is IBM Z day. The conference is free and going on now. Check out what is available here.

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Update to Chapter 4

Writing a book takes years – at least it does for me. Writing a book about a computer that is still evolving is difficult. The evolution of IBM System/z machines over the last twenty years is amazing. The things I wrote years ago are often dated now – mostly correct, but dated – newer instructions, newer techniques have come along. I’ll keep working at this – editing chapters and changing the content. Today I reposted Chapter 4. Kudos to Les Kelley for some good suggestions that got me thinking.

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A New Assembler Book: Mine

I’ve been working on a new assembler book for a while – writing new material and organizing the old material I’ve written into a coherent whole. I think there is a need for a book aimed at beginning assembler programmers, and this is my best attempt. I love John Erhman’s assembler text, Assembler Language Programming for IBM z System Servers –  Version 2.00. It’s hard to beat John’s book for the wealth of material it contains. But I would characterize that book as a reference book, rather than a textbook. What I’m aiming for is a text that an instructor could use for a class, or a book that an interested reader could use on their own to learn IBM assembly language. So the book introduces topics in an order I found helpful for teaching beginners. I hope that together these two books will help you master this language.

Here is where you come in: I could use your help. I’m publishing each of the completed chapters on the website for you to use. If you find errors or have suggestions for making it better, let me know. You see, I’m not punctilious. I try to be – it’s a goal – but I’m not, and I need your help finding errors. At some point, I’ll put all the chapters together into a physical book and make it available to you. In the meantime, help me make this better now.

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Study assembler with me in the fall

I’ll be teaching a beginning assembler class online again this fall through the Marist College IDCP as part of a two-course sequence. Together, we will write a series of assembler programs that lead to the mastery of skills needed to write assembler programs professionally. Each year, I add new materials and lectures to the course. Class sizes are manageably small, and I’ll communicate with you through on-line office hours and by email. Access to an IBM mainframe is provided as part of the course. Successful completion of these courses leads to IBM Digital certification. You can read more about the IDCP program here. Enrollment is going on now. Contact Roberta Diggins for more information (email: roberta.diggins@marist.edu or phone: 845-575-3601).

The IDCP offers courses in four areas: 1) Z/OS Programming and Applications, 2) Data Center, 3) Cybersecurity, and 4) Emerging Technologies, including an Introduction to Quantum Computing Algorithms and Programming.

I hope to see you in the fall.

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IBM Z Day – September 15, 2021

IBM Z Day 2021 is a free, 1-day virtual conference for students and professionals. I think you will find it well worth your time!

This year, IBM Z Day features 4 tracks concurrently on September 15th, and a 24-Hour Global Student Meetup starting September 14th, with 30 hours of live content.

Conference Tracks include,

  • IBM Z
  • App Modernization
  • Open Z
  • Voice of Z
  • Student Z

Register here:  http://ibm.biz/zday2021

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Print Your Own z15

Elizabeth Joseph, Camillo Sassano, and the IBM Industrial Design Program provided an STL file for the z15 you see above. My son, Bret, printed this one.

Check out Fans of IBM z and consider joining.

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Introduction to VSAM for Assembler Programmers: Part 2

I’ve added a second video as part of the introduction to VSAM for Assembler Programmers. You can find the first and second videos, as well as the related Powerpoints in the Video Course . Many thanks to Melvyn Maltz for generously making suggestions and pointing out corrections. I’ll add Part 3 soon.

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How to Print a Register

A friend of mine, Melvyn Maltz, was amused by some code I wrote recently. The code simply printed out the contents of a register, and I took a quick and dirty approach:  Store the register in a buffer, use PUT to print the buffer, SET HEX ON.  It’s a technique I often use when debugging on a mainframe.  I should tell you that my friend is an expert in most things IBM – a master programmer. He’s also generous enough to read or watch some of the material on this site and offer suggestions. In any case, the code amused him, and he reminded me that it’s not that hard to print a register – and it’s instructive.  I realized I had never written about how to print a hexadecimal representation of a register (or small field) on this site, so I’ll do that now.  It involves TR and UNPK.

Let’s start with UNPK which treats each byte of the sending field (except the last) the same. UNPK separates the zone and numeric parts of each byte (dare I call them nibbles?) into two bytes after appending a hexadecimal F on the front of each nibble, like this:

   | B 3 |
     /  \
| F B| F 3 |

A moment’s thought here is instructive.  The 3 is converted to x’F3’, which is exactly what we need to print it in a character format.  The same would be true for all digits 0-9. The treatment given to B doesn’t work so well.  The same bad treatment would occur for digits A-F. So, bytes x’FA’, x’FB’, … x’FF’ would have to be repaired after applying UNPK.  Can we fix those?  Yes.  TR can do the trick.  

So, the basic idea is to use UNPK followed by TR.  What about that last byte that UNPK converts by simply flipping the nibbles?  We can avoid that problem by adding a byte (logically or physically) to the field we are unpacking. Problem solved.

What about the TR table?  What does that look like?  My friend might suggest this,

HEXTABLE    DC    C’0123456789ABCDEF’

How do we get away without defining a 256-byte table? The solution leverages the fact that we are only translating a narrow range of sequential values:  x’F0’ – x’FF’  – every byte we need to translate begins with x’F’.  We can pretend to have created a 256-byte table by coding TR this way (assuming the register we want to print is R5):

            ST   R5,FWRD
            UNPK HEXAREAX,FWRDX
            TR   HEXAREA,HEXTABLE-240
            …
            DS  0F           ALIGNMENT
  FWRDX     DS  0CL5
  FWRD      DS   F
            DC   X'00'       AN EXTRA BYTE FOR UNPK
  HEXAREAX  DS  0CL9         8 HEX DIGITS+1 IN CHARACTER
  HEXAREA   DS   CL8         8 HEX DIGITS IN CHARACTER 
            DC   X'00'       AN EXTRA BYTE FOR UNPK

We can do this, confident that the first 240 bytes of our fictitious table will never be referenced by TR. (240 is the offset to a character 0). After translation, HEXAREA contains the result. Variations of this technique use explicit lengths and leaving off an extra byte. The only drawback to the technique is that the relative address HEXTABLE-240 may generate an addressability error if it references an address that is smaller than the base register address. This rarely happens.

My friend may get another chuckle out of this, but I’m going to suggest a second solution that uses a 256-byte table:

HEXTABLE  DC   256AL1(*-HEXTABLE)   NEUTRAL TABLE          
          ORG  HEXTABLE+X'FA'       FIX X'FA' THROUGH X'FF'
          DC   C'ABCDEF'                                   
          ORG  ,      

The rest of the solution is similar and looks like this:       

          ST    R5,FWRD
          UNPK  HEXAREAX,FWRDX   UNPK SLIGHTLY LARGER FIELDS
          TR    HEXAREA,HEXTABLE TRANSLATE THE SMALLER FIELD
          …
          DS  0F           ALIGNMENT
FWRDX     DS  0CL5
FWRD      DS   F
          DC   X'00'       AN EXTRA BYTE FOR UNPK
HEXAREAX  DS  0CL9         8 HEX DIGITS+1 IN CHARACTER FORMAT
HEXAREA   DS   CL8         8 HEX DIGITS IN CHARACTER FORMAT
          DC   X'00'       AN EXTRA BYTE FOR UNPK

After executing the first three lines above, HEXAREA will contain a printable version of register 5.

This leads into how we can print larger areas of memory in a hexadecimal format. There’s always the old standby:  SNAP.  Melvyn sent a nice example of TROT, but I’ll save that gem for another post.

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New Video: Introduction to VSAM for Assembler Programmers

Here is a shoutout to Ravi Cheepa for suggesting I needed to add some VSAM material to the site. I’ll start with this video that contains some basic information about VSAM and its macros: ACB, RPL, EXLST, PUT, GET, MODCB, …

I’ve always thought that looking at code is the best way for programmers to learn, so I’ll follow this up with a series of demo programs that do something interesting and efficiently. I’ll also add some video to explain the programs and why the techniques they use are efficient. More soon …

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New Video: External DSECTS – Q-cons, CXDs, and DXDs

Q-cons, CXDs, and DXDs enlist the help of the Binder to make it easy for you to allocate storage dynamically for all your CSECTS. They also widen the possibilities for how you can design multi-CSECT programs. Some companies use these ideas to promote the separation of storage and code. In any case, this is an interesting HLASM path to explore.

I’ve created a video to explain these ideas and a sample program listed below that you can use as skeleton code for further exploration.

        PRINT  ON,NODATA,NOGEN
**********************************************************************
**********************  STORAGE FOR ASECT ****************************
**********************************************************************
ASTOR    DSECT
A1       DS    CL80       SOME VARIABLES FOR ASECT
A2       DS    CL30
A3       DS    CL5
A4       DS    PL10
A5       DS    200CL5
SAVEA    DS    18F        AREA FOR MY CALLEE TO SAVE & RESTORE MY REGS
**********************************************************************
**********************  STORAGE FOR PARMS ****************************
**********************************************************************
PARMSECT DSECT
X        DS    CL80
Y        DS    CL80
Z        DS    CL80
**********************************************************************
**********************  ASECT CONTROL SECTION ***********************
**********************************************************************
ASECT   CSECT
ASECT   AMODE  31
ASECT   RMODE  24
**********************  ENTRY LOGIC  *********************************
         STM   14,12,12(R13)          SAVE CALLER'S REGS
         BASR  R12,0                  ESTABLISH
         USING *,R12                  ADDRESSABILITY
         L     R8,EDSLEN              GRAB LENGTH OF STORAGE NEEDED
         STORAGE OBTAIN,LENGTH=(R8),ADDR=(R11)
         LR    R10,R11                GRAB ADDRESS FOR ALL STORAGE
         A     R10,ASECTO             ADD OFFSET FOR MY DSECT
         USING ASTOR,R10              I HAVE ADDRESSABILITY
         ST    R13,SAVEA+4            BACK-CHAIN CALLER'S FROM MINE
         LA    R13,SAVEA              POINT TO MY LOWER-LEVEL SA
**********************  BEGIN LOGIC  *********************************
         OPEN  (FILEOUT,(OUTPUT))
         PUT   FILEOUT,=CL80'ENTERING PROGASECT'
         LR    R9,R11                  POINT AT DYNAMIC STORAGE
         A     R9,PARMO                ADD THE OFFSET FOR PARMS
         USING PARMSECT,R9             I HAVE ADDRESSABILITY
         MVC   X,=CL80'THIS IS PARM X' INITIALIZE ...
         MVC   Y,=CL80'THIS IS PARM Y' ... PARMS
         MVC   Z,=CL80'THIS IS PARM Z'
         LA    R1,=A(FILEOUT,PARMO)   PASS THE DCB AND PARMO
         L     R15,=A(BSECT)          CALLING BSECT
         BASR  R14,R15                BRANCH THERE
         PUT   FILEOUT,=CL80'RETURNED TO PROGA1'
         LR    R9,R11                 POINT AT ALLOCATED STORAGE
         A     R9,XXXAO               ADD THE OFFSET TO XXX
         PUT   FILEOUT,0(R9)          R9 POINTS AT XXX
         CLOSE FILEOUT
         STORAGE RELEASE,LENGTH=(R8),ADDR=(R11)
*********************** STARDARD EXIT ********************************
RETURN   EQU   *                      BRANCH TO HERE FOR NORMAL RETURN
         L     R13,SAVEA+4            POINT TO CALLER'S SAVE AREA
         LM    R14,R12,12(R13)        RESTORE CALLER'S REGS
         LA    R15,0                  SET RETURN CODE REG 15 = 0
         BR    R14
****************** LOCAL DATA AREAS   ********************************
FILEOUT  DCB   DSORG=PS,                                               X
               MACRF=(PM),                                             X
               DEVD=DA,                                                X
               DDNAME=FILEOUT,                                         X
               RECFM=FB,                                               X
               LRECL=80
ASECTO   DC    Q(ASTOR)               OFFSET TO ASTOR
PARMO    DC    Q(PARMSECT)            OFFSET TO PARMSECT
XXX      DXD   CL80                   DECLARATION OF XXX IN EDS
XXXAO    DC    Q(XXX)                 OFFSET TO XXX
EDSLEN   CXD                          FULLWORD TOTAL SPACE NEEDED
         LTORG
         YREGS

**********************************************************************
**********************  STORAGE FOR BSECT ****************************
**********************************************************************
BSTOR    DSECT
B1       DS     F           THE STORAGE AREAS NEEDED IN BSECT
B2       DS     CL20
B3       DS     PL5
B4       DS     CL100
B5       DS     CL5
SAVEB    DS   18F                     BSECT SAVE AREA
**********************************************************************
**********************  BSECT CONTROL SECTION ***********************
**********************************************************************
BSECT    CSECT
         STM   14,12,12(R13)          SAVE CALLER'S REGS
         BASR  R12,0                  ESTABLISH
         USING *,R12                  ADDRESSABILITY
         LR     R10,R11               SET UP...
         A      R10,BSECTO            ... ADDRESSABILITY FOR BSECT
         USING  BSTOR,R10             I HAVE STORAGE ADDRESSABILITY
         LR     R9,R11                POINT AT ALLOCATED MEMORY
         L      R6,4(R0,R1)           R6 POINTS AT PARMO
         A      R9,0(R0,R6)           ADD THE OFFSET FOR PARMS
         USING  PARMSECT,R9           I HAVE PARM ADDRESSABILITY
         ST     R13,SAVEB+4
         LA     R13,SAVEB
**********************  BEGIN LOGIC  *********************************
         L      R5,0(R0,R1)           R5 POINTS AT MY RECOUT DCB
         PUT    (R5),=CL80'ENTERED BSECT'
         PUT    (R5),X                PRINT THE PARMS
         PUT    (R5),Y
         PUT    (R5),Z
*
*        USE BSTOR FIELDS CAN BE USED HERE
*
         MVC    B4,=CL80'THIS IS B4 DATA'
         PUT    (R5),B4
*
*        PREPARE TO USE XXX
*
         LR     R9,R11                POINT AT XDS WITH R9
         A      R9,XXXBO              ADD THE OFFSET TO XXX
         MVC    0(80,R9),=CL80'XXX IN ASECT WAS CHANGED IN BSECT'
*
         PUT    (R5),=CL80'ABOUT TO LEAVE BSECT'
*********************** STARDARD EXIT ********************************
         L      R13,SAVEB+4           STANDARD EXIT CODE
         LM     R14,R12,12(R13)
         BR     R14
************* INITIALIZED DATA AREAS AND PARMS ***********************
BSECTO   DS     Q(BSTOR)      OFFSET FOR BSECT STORAGE
XXXBO    DC     Q(XXX)        OFFSET TO XXX
         LTORG
         END   ASECT

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