Perhaps you’re like me, and as a fledgling assembler programmer, you learned the Shift and Round Decimal instruction (SRP) from a handful of choice examples. Something like this one,
SRP MYFIELD,3,0 SHIFT MYFIELD LEFT BY 3 DIGITS
If you were lucky, maybe someone showed you the 64-N trick for computing a right shift by N digits like this one,
SRP MYFIELD,64-3,5 SHIFT MYFIELD RIGHT BY 3 DIGITS
SRP MYFIELD,61,5 SHIFT MYFIELD RIGHT BY 3 DIGITS
After trying this out and getting it to work in a few programs, I committed the ideas to memory and didn’t give it much thought for a few years. At some point though, I figured out that that second parameter in these instructions is a base/displacement address, and not just a decimal number that somehow gets converted to 2’s complement. Looking up the explicit format for the instruction I found this,
The second parameter is a base/displacement, so the 3, or 64-3, or 61 we coded above, is treated as a displacement by the assembler and the base register is assumed to be 0. So, what’s going on with that address? The Principles of Operation solved the mystery for me. The base/displacement address is converted to an effective address, the effective address is then truncated to the rightmost 6 bits, and the remaining value is treated as a 2’s complement binary integer. With that value, we can shift 32 digits to the right or 31 digits to the left.
Never one to miss a trick (albeit rather slowly), it finally dawned on me, that if operand 2 is a base/displacement address, we could put the shift factor in a register and make the displacement 0 like this,
L R6,=F’-3’ SHIFT FACTOR GOES IN R3
SRP MYFIELD,0(R6),5 SHIFT MYFIELD RIGHT BY 3 DIGITS
Not much of an improvement, if any, but it does open the possibility of changing the shift factor on the fly by manipulating the register dynamically instead of hard-coding it into the instruction at assembly time – a technique you might occasionally find useful.
The same technique (but with a different interpretation of those 6 bits) works on all shift operations. For example, SRA, SRDA, SLL, … The 6-bit shift factor for these shifts is treated as a plain binary number (instead of 2’s complement) because the direction of the shift is baked into the instruction. In all cases, you can put the shift factor in the register, and use it to control the shift factor on the fly – very shifty!
You can watch that happen in this short Viziblez demo video here.
2 responses to “Shifty Shifts”
Those shifty, shifty shifts. Good info!
Hope you are doing well and staying safe. Wish you and your family a very Merry Christmas and Happy New Year!
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Good to hear from you, Michael. Hope to see you at a Marist IDCP conference one summer. Happy Holidays!